New Statistical Data and Modeling of Stress-Induced Leakage Current in 3D-NAND Floating Gate Non-Volatile Flash Memories

被引：2

作者：

Chimenton, Andrea ^{[1
]}

Mielke, Neal R. ^{[2
]}

Cho, Eunhwan ^{[1
]}

Kalastirsky, Ivan ^{[1
]}

机构：

[1] Intel Corp, Folsom, CA 95630 USA

[2] Intel Corp, Santa Clara, CA 95054 USA

来源：

IEEE ELECTRON DEVICE LETTERS | 2022年 / 43卷 / 01期

关键词：

Flash memories; Three-dimensional displays; Stress; Data models; Leakage currents; Analytical models; Programming; Flash; NAND; NOR; leakage; statistical models; OXIDE; RELIABILITY; RETENTION; ELECTRON;

D O I：

10.1109/LED.2021.3132325

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We analyzed statistical data of Stress-Induced Leakage Current (SILC) mechanism in Flash memories from a wide range of technology nodes from both 2D/3D Floating Gate NAND Flash. We found that the statistical distribution of threshold voltage as measured at room temperature retention tests can significantly deviate from the exponential law which is commonly used to model the distribution of cells affected by SILC. In this work we show new data and present a new analytical model describing the statistical variability and evolution in time of Flash SILC that shows very good agreement with data from both past and present technology nodes.

引用

页码：29 / 31

页数：3