A high efficiency DC-DC converter using 2nH on-chip inductors

被引:17
作者
Wibben, Josh [1 ]
Harjani, Rainesh [1 ]
机构
[1] Univ Minnesota, Dept ECE, Minneapolis, MN 55455 USA
来源
2007 Symposium on VLSI Circuits, Digest of Technical Papers | 2007年
关键词
D O I
10.1109/VLSIC.2007.4342750
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Historically buck converters have relied on high-Q inductors on the order of I to 100 mu H to achieve high efficiency. In this paper we exploit on-chip magnetic coupling in the proposed stacked interleaved topology to enable high efficiency buck converters to be realized with 2nH moderate-Q on-chip inductors. The measured conversion efficiency for a prototype circuit implemented in a 130-nm CMOS technology was over double that of a linear converter for low output voltages rising to a peak value of 77.9% for a 0.9V output.
引用
收藏
页码:22 / 23
页数:2
相关论文
共 5 条
  • [1] Carsten B.W., 1999, US Patent, Patent No. [5,929,692, 5929692]
  • [2] A 233-MHz 80%-87% elfficient four-phase DC-DC converter utilizing air-core inductors on package
    Hazucha, P
    Schrom, G
    Hahn, J
    Bloechel, BA
    Hack, P
    Dermer, GE
    Narendra, S
    Gardner, D
    Karnik, T
    De, V
    Borkar, S
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2005, 40 (04) : 838 - 845
  • [3] Lee J, 2003, INTERNATIONAL SYMPOSIUM ON SYSTEM-ON-CHIP, PROCEEDINGS, P155, DOI 10.1109/ISSOC.2003.1267744
  • [4] Performance improvements of interleaving VRMs with coupling inductors
    Wong, PL
    Xu, P
    Yang, B
    Lee, FC
    [J]. IEEE TRANSACTIONS ON POWER ELECTRONICS, 2001, 16 (04) : 499 - 507
  • [5] On-chip spiral inductors with patterned ground shields for Si-based RF IC's
    Yue, CP
    Wong, SS
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1998, 33 (05) : 743 - 752