High-Tc superconductor sampler system for digital signal waveform measurement

被引:19
作者
Hidaka, M [1 ]
Satoh, T
Kimishima, M
Takayama, M
Tahara, S
机构
[1] NEC Corp Ltd, Tsukuba, Ibaraki 3058501, Japan
[2] Advantest Corp, Gyoda, Saitama 3610021, Japan
关键词
SFQ circuit; sampler; digital signal; High-T-c superconductor;
D O I
10.1109/77.919335
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
We are developing a system using a high-T-c superconductor (HTS) sampler for measuring a 40-Gbps digital signal waveform, which will be used in next generation ultra-high-speed communications. To measure a 40-Gbps digital signal, the sampler bandwidth needs to be more than 120 GHz. The HTS sampler has the potential to achieve this bandwidth. As a first step in developing this system, we have developed a prototype whose target bandwidth is 40 GHz. In the prototype system, the sampler chip is cooled down to 35 K by a single-stage Stirling cryocooler, and the digital signal is transmitted to the sampler chip via a 40-GHz bandwidth assembly line. This system is the first to integrate an HTS device, a cryocooler, and a high-frequency assemble line. A 5.9-Gbps digital waveform was reconstituted by the prototype system with the correct period.
引用
收藏
页码:267 / 270
页数:4
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