共 50 条
- [42] A flash EEPROM cell with self-aligned trench transistor & isolation structure 2000 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS, 2000, : 124 - 125
- [44] SICOS HIGH-SPEED SELF-ALIGNED BIPOLAR-TRANSISTOR JAPAN ANNUAL REVIEWS IN ELECTRONICS COMPUTERS & TELECOMMUNICATIONS, 1984, 13 : 151 - 162
- [45] Self-Aligned Block and Fully Self-Aligned Via for iN5 Metal 2 Self-Aligned Quadruple Patterning EXTREME ULTRAVIOLET (EUV) LITHOGRAPHY IX, 2018, 10583
- [47] Overlay-aware Layout Legalization for Self-Aligned Double Patterning Lithography 2016 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN, AUTOMATION AND TEST (VLSI-DAT), 2016,