Automated Design of a 13.56 MHz 19 μW Passive Rectifier With 72% Efficiency Under 10 μA load

被引:19
作者
Haddad, Pierre-Antoine [1 ]
Gosset, Geoffroy [1 ]
Raskin, Jean-Pierre [1 ]
Flandre, Denis [1 ]
机构
[1] Catholic Univ Louvain, Inst Informat & Commun Technol, Elect & Appl Math, B-1348 Louvain La Neuve, Belgium
关键词
AC-DC power converters; design optimization; energy efficiency; energy harvesting; gradient methods; inductive power transmission; low-power electronics; rectifiers; ultra-low-power (ULP) diodes; CMOS RECTIFIER; SENSOR; COMPARATOR; MOBILE;
D O I
10.1109/JSSC.2016.2527714
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A three-stage Greinacher rectifier is designed using ultra-low-leakage CMOS diodes and characterized at 13.56 MHz for a 1 Vpp sinusoidal input and a 10 mu A load current in 250 nm CMOS bulk technology. The measured dc output voltage is 1.9 V with 72% power conversion efficiency providing a 19 mu W output power. This ultra-low-power and high-efficiency ac/dc power converter with 0.13 mm(2) chip area can be used with RF energy harvesters to power implantable or wearable biomedical devices in body sensor networks. The automated design optimization methodology using a gradient method and foundry models is presented and discussed. The measured performances are presented for various frequencies, load currents, and input voltages. The robustness against process and temperature variations is studied through temperature measurements and corner simulations.
引用
收藏
页码:1290 / 1301
页数:12
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