A Low-Power Receiver Down-Converter with High Dynamic Range Performance

被引：8

作者：

Ghosh, Diptendu ^{[1
]}

Gharpurey, Ranjit ^{[1
]}

机构：

[1] Univ Texas Austin, Austin, TX 78712 USA

来源：

2010 IEEE RADIO FREQUENCY INTEGRATED CIRCUITS RFIC SYMPOSIUM | 2010年

关键词：

Active noise reduction; bias current sharing; down-converter; linearization; non-linear feedback; 0.18-MU-M CMOS; FRONT-END;

D O I：

10.1109/RFIC.2010.5477305

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

A low-power down-converter that uses a passive current-commutating mixer for frequency translation, while sharing the bias current between the RF and baseband stages is presented. An active noise shaping network is implemented to reduce low-frequency noise at the output. Linearity is enhanced through the use of non-linear feedback. The design, implemented in a 0.18 mu m CMOS technology, achieves conversion gain of 35 dB, NF of 9.8 dB, in-channel OIP3 of 15.8 dBV while consuming 2.1 mA from a 1.8 V supply.

引用

页码：35 / 38

页数：4

共 6 条

[1]

Deguchi J., 2009, IEEE INT SOLID STATE, P224

[2] Design of a High Performance 2-GHz Direct-Conversion Front-End With a Single-Ended RF Input in 0.13 μm CMOS [J].