Modeling of Reconfigurable ΣΔ Modulator for Multi-standard Wireless Receivers in Verilog-A

被引:0
|
作者
Castro, Mateus [1 ]
Souza, Raphael [1 ]
Junior, Agord [1 ]
Lima, Eduardo [2 ]
Manera, Leandro [1 ]
机构
[1] Univ Estadual Campinas, Campinas, SP, Brazil
[2] Eldorado Res Inst, Campinas, SP, Brazil
关键词
D O I
10.1109/SBCCI53441.2021.9529972
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This paper presents the modeling and design of a reconfigurable Sigma Delta modulator in Verilog-A language for applications in multi-standard wireless receivers. Main building blocks are implemented separately and its development detailed. Results presented are from simulations in SPECTRE circuit simulator in Cadence Virtuoso Analog Design Environment using Verilog-A models of main sub-circuits. The modulator achieves SNR values of 78.7 dB for GSM (EDGE) operation (200 kHz bandwidth), 79.9 dB for Bluetooth operation (500 kHz bandwidth) and 55.3 dB for UMTS (W-CDMA) operation (2 MHz bandwidth).
引用
收藏
页数:6
相关论文
共 50 条
  • [1] A triple-mode reconfigurable σ-δ modulator for multi-standard wireless applications
    Morgado, Alonso
    del Rio, Rocio
    de la Rosa, Jose M.
    2008 DESIGN, AUTOMATION AND TEST IN EUROPE, VOLS 1-3, 2008, : 741 - 746
  • [2] Low-Complexity Reconfigurable Fast Filter Bank for Multi-Standard Wireless Receivers
    Darak, Sumit J.
    Gopi, Smitha Kavallur Pisharath
    Prasad, Vinod Achutavarrier
    Lai, Edmund
    IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2014, 22 (05) : 1202 - 1206
  • [3] AReconfigurable ΣΔ Modulator for Multi-Standard Wireless Application
    Chai, Lu
    Tan, Xi
    Min, Hao
    2008 9TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED-CIRCUIT TECHNOLOGY, VOLS 1-4, 2008, : 1909 - 1912
  • [4] Behavioral modeling, simulation and synthesis of multi-standard wireless receivers in MATLAB/SIMULINK
    Morgado, A.
    Rivas, V. J.
    del Rio, R.
    Castro-Lopez, R.
    Fernandez, F. V.
    de la Rosa, J. N.
    INTEGRATION-THE VLSI JOURNAL, 2008, 41 (02) : 269 - 280
  • [5] A 0.13 μm BiCMOS Reconfigurable Analog Baseband for Multi-mode Multi-standard Wireless Receivers
    Tao, Jian
    Fan, Xiangning
    PROCEEDINGS OF THE 7TH INTERNATIONAL JOINT CONFERENCE ON PERVASIVE AND EMBEDDED COMPUTING AND COMMUNICATION SYSTEMS (PECCS), 2017, : 100 - 104
  • [6] Design of a Reconfigurable Mixer for Multi-mode Multi-standard Receivers
    Gu, Cheng-jie
    Fan, Xiang-ning
    Bao, Kuan
    Hua, Zai-jun
    MATERIALS, MACHINES AND DEVELOPMENT OF TECHNOLOGIES FOR INDUSTRIAL PRODUCTION, 2014, 618 : 553 - 557
  • [7] FPGA Implementation of High Speed Reconfigurable Filter Bank for Multi-standard Wireless Communication Receivers
    Garg, Sasha
    Darak, S. J.
    2016 20TH INTERNATIONAL SYMPOSIUM ON VLSI DESIGN AND TEST (VDAT), 2016,
  • [8] A triple-mode sigma-delta modulator for multi-standard wireless radio receivers
    Rusu, A
    Borodenkov, A
    Ismail, M
    Tenhunen, H
    ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 2006, 47 (02) : 113 - 124
  • [9] A Triple-Mode Sigma-Delta Modulator for Multi-Standard Wireless Radio Receivers
    Ana Rusu
    Alexei Borodenkov
    Mohammed Ismail
    Hannu Tenhunen
    Analog Integrated Circuits and Signal Processing, 2006, 47 : 113 - 124
  • [10] Modeling a wireless IF sampling circuit in Verilog-A
    Kundert, K
    Filseth, E
    COMPUTER DESIGN, 1996, 35 (01): : 102 - 104