A Back Biasing Voltage Generator for 28nm UTBB-FDSOI RVT CMOS Digital Circuits

被引:0
作者
Pelicia, Marcos Mauricio [1 ]
Coimbra, Ricardo Pureza [1 ]
Zanetta, Pedro Barbosa
机构
[1] NXP Semicondutores Brasil Ltda, Microcontrollers R&D, Secur & Connect Div, Campinas, SP, Brazil
来源
2018 INTERNATIONAL CONFERENCE ON IC DESIGN AND TECHNOLOGY (ICICDT 2018) | 2018年
关键词
reverse back biasing; forward back biasing; 28nm UTBB FDSOI; microcontrollers; regulator; i.MX7ULP;
D O I
暂无
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
This paper presents a Back-Biasing regulation module developed for the next-generation of 28nm UTBB FDSOI (Ultra-Thin Box and Body Fully Depleted Silicon On Insulator) IOT microcontroller products. The module enables both Reverse Back Biasing (RBB) and Forward Back Biasing (FBB) of a standard digital logic region with programmable voltage levels. Main design requirements and regulator load characteristics are analyzed. A description of the load model is also included. Silicon results from a circuit implementation included in i.MX7ULPT low-power microcontroller are presented. The circuit occupies an area of 0.2mm(2) with negligible power consumption compared to the total system.
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页码:1 / 4
页数:4
相关论文
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  • [1] A 3 GHz Dual Core Processor ARM CortexTM-A9 in 28 nm UTBB FD-SOI CMOS With Ultra-Wide Voltage Range and Energy Efficiency Optimization
    Jacquet, David
    Hasbani, Frederic
    Flatresse, Philippe
    Wilson, Robin
    Arnaud, Franck
    Cesana, Giorgio
    Di Gilio, Thierry
    Lecocq, Christophe
    Roy, Tanmoy
    Chhabra, Amit
    Grover, Chiranjeev
    Minez, Olivier
    Uginet, Jacky
    Durieu, Guy
    Adobati, Cyril
    Casalotto, Davide
    Nyer, Frederic
    Menut, Patrick
    Cathelin, Andreia
    Vongsavady, Indavong
    Magarshack, Philippe
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2014, 49 (04) : 812 - 826
  • [2] Pelliconi R., 2001, ESSCIRC 2001. Proceedings of the 27th European Solid-State Circuits Conference, P100
  • [3] Pique G. V., 2011, 37th European Solid State Circuits Conference (ESSCIRC 2011), P379, DOI 10.1109/ESSCIRC.2011.6044986
  • [4] Planes N, 2012, IEEE, V2012, P133, DOI DOI 10.1109/VLSIT.2012.6242497