Design of a VLSI processor chip for three-dimensional instrumentation

被引:0
|
作者
Lee, SW
Hariyama, M
Kameyama, M
机构
来源
SICE '97 - PROCEEDINGS OF THE 36TH SICE ANNUAL CONFERENCE, INTERNATIONAL SESSION PAPERS | 1997年
关键词
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暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Three-dimensional(3-D) instrumentation based on optical flow is a promising instrumentation method for intelligent systems in which accurate 3-D information is required. However, real-time instrumentation is difficult since much computation time and a large memory bandwidth are required. In this paper, a 3-D instrumentation VLSI processor with a concurrent memory-access scheme is proposed. To reduce the access time, frequently used data are stored in a cache register array and are concurrently transferred to processing elements using simple interconnections to the 8-nearest neighbor registers. Based on a row and column memory access pattern, we propose a diagonally interleaved frame memory by which pixel values of a row and column are stored across memory modules. Therefore, the pixel values are read in parallel from the frame memory. Based on the concurrent memory-access scheme, the performance of the processor is 2 million times faster than that of a 28.5 MIPS workstation.
引用
收藏
页码:951 / 954
页数:4
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