Design methodology of Miller frequency compensation with current buffer/amplifier

被引:39
作者
Aloisi, W. [1 ]
Palumbo, G. [1 ]
Pennisi, S. [1 ]
机构
[1] Univ Catania, Dipartimento Ingn Elettr Elettron & Sistemi, I-95124 Catania, Italy
关键词
D O I
10.1049/iet-cds:20060188
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Current buffers/amplifiers are used in series to the Miller compensation capacitor with the aim of eliminating the positive zero introduced by the forward path. They are increasingly adopted because of their low-voltage features, high-speed performance and, recently, for their suitability to be used with large capacitive loads (when a current gain is introduced). The authors propose a novel and simple design approach for the frequency compensation of a two-stage amplifier exploiting a current buffer/amplifier. The procedure has been profitably applied to a class-AB; two-stage CMOS operational transconductance amplifier, having a 100 pF load. In particular, three compensation networks were designed using a 1.3 pF, 0.6 pF and 250 fF compensation capacitor alternatively. Moreover, the adopted compensation topology provides an improvement in terms of power supply rejection ratio, which was also analytically demonstrated. Simulations that are in very good agreement with theoretical results are also given.
引用
收藏
页码:227 / 233
页数:7
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