Lightweight Architecture for Elliptic Curve Scalar Multiplication over Prime Field

被引:23
作者
Hao, Yue [1 ]
Zhong, Shun'an [1 ,2 ]
Ma, Mingzhi [3 ]
Jiang, Rongkun [1 ,2 ,4 ]
Huang, Shihan [1 ]
Zhang, Jingqi [1 ]
Wang, Weijiang [1 ,2 ]
机构
[1] Beijing Inst Technol BIT, Sch Integrated Circuits & Elect, Beijing 100081, Peoples R China
[2] BIT Chongqing Inst Microelect & Microsyst, Chongqing 401332, Peoples R China
[3] UNISOC Shanghai Technol Co Ltd, Shanghai 201203, Peoples R China
[4] BIT Chongqing Innovat Ctr, Chongqing 401135, Peoples R China
关键词
elliptic curve cryptography (ECC); lightweight implementation; Montgomery ladder; Co-Z arithmetic; field programmable gate array (FPGA); ECC PROCESSOR; CRYPTOGRAPHY; PERFORMANCE;
D O I
10.3390/electronics11142234
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
In this paper, we present a novel lightweight elliptic curve scalar multiplication architecture for random Weierstrass curves over prime field F-p. The elliptic curve scalar multiplication is executed in Jacobian coordinates based on the Montgomery ladder algorithm with (X,Y)-only common Z coordinate arithmetic. At the finite field operation level, the adder-based modular multiplier and modular divider are optimized by the pre-calculation method to reduce the critical path while maintaining low resource consumption. At the group operation level, the point addition and point doubling methods in (X,Y)-only common Z coordinate arithmetic are modified to improve computation parallelism. A compact scheduling method is presented to improve the architecture's performance, which includes appropriate scheduling of finite field operations and specific register connections. Compared with existing works, our design is implemented on the FPGA platform without using DSPs or BRAMs for higher portability. It utilizes 6.4k similar to 6.5k slices in Kintex-7, Virtex-7, and ZYNQ FPGA and executes an elliptic curve scalar multiplication for a field size of 256-bit in 1.73 ms, 1.70 ms, and 1.80 ms, respectively. Additionally, our design is resistant to timing attacks, simple power analysis attacks, and safe-error attacks. This architecture outperforms most state-of-the-art lightweight designs in terms of area-time products.
引用
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页数:24
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