Influence of fin width variation on the electrical characteristics of n-type junctionless nanowire transistors at high temperatures

被引:2
|
作者
Ribeiro, Thales Augusto [1 ]
Bergamaschi, Flavio Enrico [1 ]
Barraud, Sylvain [2 ,3 ]
Pavanello, Marcelo Antonio [1 ]
机构
[1] Ctr Univ FEI, Dept Elect Engn, Sao Bernardo Do Campo, Brazil
[2] LCTE CEA, SCME, MINATEC Campus, Dept Composants Silicium,LETI, Grenoble, France
[3] Univ Grenoble Alpes, Grenoble, France
基金
巴西圣保罗研究基金会;
关键词
Junctionless; SOI; High temperature; Electron mobility; MOBILITY; PERFORMANCE; MOSFETS; DESIGN;
D O I
10.1016/j.sse.2021.108072
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This work studied the effects of the fin width variation on Silicon-on-Insulator Junctionless Nanowire Transistors (JNTs) working in the temperature range of 300 K to 500 K. The effects of the temperature on the measured drain current and gate capacitance, and on the extracted electrical parameters such as the threshold voltage, the subthreshold slope, and the electron mobility were analyzed. Results show that JNTs with larger fin width may present better carrier mobility at a higher temperature than narrow ones as the degradation due to phonon scattering is decreased and the impurity scattering becomes more relevant. It is demonstrated that JNTs with narrow fin width show higher phonon scattering and higher mobility variation with the temperature than wider ones.
引用
收藏
页数:7
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