Design of a constant loop bandwidth phase-locked loop based on artificial neural network

被引：0

作者：

Guo, Rui ^{[1
]}

Wu, YuanCong ^{[1
]}

Hu, ShaoGang ^{[1
]}

Yu, Qi ^{[1
]}

Chen, Tupei ^{[2
]}

Liu, Yang ^{[1
]}

机构：

[1] Univ Elect Sci & Technol China, State Key Lab Elect Thin Films & Integrated Devic, Nanyang, Peoples R China

[2] Sch Elect & Elect Engn, Nanyang, Peoples R China

来源：

IEICE ELECTRONICS EXPRESS | 2021年 / 18卷 / 09期

关键词：

neural networks; MLP; PLL; bandwidth; MULTILAYER PERCEPTRON; FREQUENCY; PLL; CIRCUIT;

D O I：

10.1587/elex.18.20210120

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

An LC-VCO based phase-locked loop (PLL) frequency synthesizer which incorporates loop bandwidth tracking technique based on neural network is presented in this work. In order to minimize loop bandwidth variations, the proposed PLL employs an averaging varactor based split-tuned LC-VCO and a controllable phase error scaling module. Biasing voltages of varactor and the control word of the phase error scaling module are trained by the neural network and updated. The proposed technique can maintain a constant loop bandwidth over operating frequencies from 1.6-2GHz with variation varying from -2.66 similar to 3%.

引用

页数：6

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