Comprehensive Behavioral Modeling of Conventional and Dual-Tuning PLLs

被引:11
作者
Bizjak, Luca [1 ,2 ]
Da Dalt, Nicola [2 ]
Thurner, Peter [2 ]
Nonis, Roberto [1 ,2 ]
Palestri, Pierpaolo [1 ]
Selmi, Luca [1 ]
机构
[1] Univ Udine, DIEGM, I-33100 Udine, Italy
[2] Infineon Technol Austria, A-9500 Villach, Austria
关键词
Circuit modeling; circuit simulation; frequency synthesizers; nonlinear circuits; phase-locked loops (PLLs); phase noise; voltage-controlled oscillators (VCOs);
D O I
10.1109/TCSI.2008.916700
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents a modular and comprehensive nonlinear time-domain behavioral model for phase-locked loops (PLLs) that are suitable for analyzing the impact on the output signal of the noise contribution and nonidealities of the constituent building blocks. The model building blocks are described by Simulink submodels and can be configured to implement different PLL topologies. Postprocessing of the PLL output provides the PLL phase noise and spur-to-carrier-ratio performances. The calculated phase-noise spectra are compared with those obtained with the well-known linear model and with measurements. To show the flexibility of this approach, many case studies are reported; among them, the analysis of the spurs due to charge pump mismatch and the transient phase noise, and spurs performances of a PLL featuring a dual control of the voltage-controlled oscillator.
引用
收藏
页码:1628 / 1638
页数:11
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