A Real-Time FPGA Based Human Detector

被引：12

作者：

Hsiao, Pei-Yung ^{[1
]}

Lin, Shih-Yu ^{[1
]}

Chen, Chuen-Yau ^{[1
]}

机构：

[1] Natl Univ Kaohsiung, Dept Elect Engn, Kaohsiung, Taiwan

来源：

2016 INTERNATIONAL SYMPOSIUM ON COMPUTER, CONSUMER AND CONTROL (IS3C) | 2016年

关键词：

HOG; FPGA Accelerator; Machine Learning; Human Detection; Real-Time Embedded System; HOG FEATURE-EXTRACTION; HARDWARE; DESIGN; SYSTEM;

D O I：

10.1109/IS3C.2016.256

中图分类号：

TP301 [理论、方法];

学科分类号：

081202 ;

摘要：

An ARM-platform and FPGA-based accelerator rather than PC-based system is utilized in this study for completing a real-time FPGA-based human detector. The system presents the advantages of small size, low cost, high computing speed, and being portable and could be built in small cameras for surveillance applications. When background segmentation is introduced, the computing efficiency could reach about 15 fps. Moreover, this study has proven that the reduction on the total detection rate is less than 0.3% while changing HOG algorithm into the presented FPGA hardware implementation.

引用

收藏

页码：1014 / 1017

页数：4

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