Testing systems on a chip

被引:68
作者
Chandramouli, R [1 ]
Pateras, S [1 ]
机构
[1] LOGICVIS INC, SYST BIST, SAN JOSE, CA USA
关键词
D O I
10.1109/6.542274
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
[No abstract available]
引用
收藏
页码:42 / 47
页数:6
相关论文
共 6 条
  • [1] [Anonymous], IEEE DESIGN TEST COM
  • [2] [Anonymous], IEEE DESIGN TEST COM
  • [3] Bardell PaulH., 1987, BUILT IN TEST VLSI P
  • [4] BEENKER FPM, 1995, TESTABILITY CONCEPTS
  • [5] BOUWMAN F, 1992, MACRO TESTABILITY RE, P232
  • [6] MAUNDER C, 1993, INTERNATIONAL TEST CONFERENCE 1993 PROCEEDINGS, P21, DOI 10.1109/TEST.1993.470722