A Quad-Band GSM/GPRS/EDGE SoC in 65 nm CMOS

被引:28
作者
Darabi, Hooman [1 ]
Chang, Paul [1 ]
Jensen, Henrik [1 ]
Zolfaghari, Alireza [1 ]
Lettieri, Paul [1 ]
Leete, John C. [1 ]
Mohammadi, Behnam [1 ]
Chiu, Janice [1 ]
Li, Qiang [1 ]
Chen, Shr-Lung [1 ]
Zhou, Zhimin [1 ]
Vadipour, M. [1 ]
Chen, C. [1 ]
Chang, Yuyu [1 ]
Mirzaei, Ahmad [1 ]
Yazdi, Ahmad [1 ]
Nariman, Mohammad [1 ]
Hadji-Abdolhamid, Amir [1 ]
Chang, Ethan [1 ]
Zhao, B. [1 ]
Juan, Kevin [1 ]
Suri, Puneet [1 ]
Guan, C. [1 ]
Serrano, L. [1 ]
Leung, John [1 ]
Shin, J. [1 ]
Kim, J. [1 ]
Tran, H. [1 ]
Kilcoyne, P. [1 ]
Vinh, H. [1 ]
Raith, Eric [1 ]
Koscal, M. [1 ]
Hukkoo, Ajat [1 ]
Hayek, C. [1 ]
Rakhshani, V. [1 ]
Wilcoxson, Charlie [1 ]
Rofougaran, Maryam [1 ]
Rofougaran, Ahmadreza [1 ]
机构
[1] Broadcom Corp, Irvine, CA 92617 USA
关键词
Cellular; CMOS; crystal oscillator; direct conversion; direct modulation; EDGE; EDGE SoC; 8PSK; GPRS; GMSK; GSM; low IF; polar; PLL; SoC; submicron CMOS; NOISE;
D O I
10.1109/JSSC.2011.2109432
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A quad-band 2.5G SoC integrating all the RF, DSP, ARM, audio and other baseband processing functions into a single 65 nm CMOS die is described. The paper focuses on the radio portion mostly, and addresses the challenges of realizing a complete GSM/EDGE SoC with the RF integrated along with the rest of digital baseband circuitry. Several circuit level as well as architectural techniques are presented to realize a very low-cost and low-power 2.5G radio while meeting the stringent cellular requirements with wide margin. The radio draws a battery current of 49 mA in the receiver-mode, and 86/77 mA in the GMSK/8PSK transmit-mode. The low-IF receiver achieves a sensitivity of -110 dBm at the antenna, corresponding to a noise figure of 2.4 dB at the device input. The 8PSK +/- 400 kHz modulation mask is -64.1/62.7 dBc for high/low bands, with an RMS EVM of 2.45/1.95%. The radio core area is 3.95 mm(2).
引用
收藏
页码:870 / 882
页数:13
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