Layout-Based Test Coverage Verification for High-Reliability Devices

被引：1

作者：

Nagamura, Yoshikazu ^{[1
]}

Shiozawa, Kenji ^{[1
,2
]}

Koyama, Toru ^{[1
]}

Matsushima, Jun ^{[3
]}

Tomonaga, Kazuhiro ^{[3
]}

Hoshi, Yutaka ^{[4
]}

Nomura, Shuji ^{[4
]}

Arai, Masayuki ^{[5
]}

Iwasaki, Kazuhiko ^{[6
]}

机构：

[1] Renesas Semicond Mfg Co Ltd, Anal & Evaluat Technol Dept, Ibaraki 3128504, Japan

[2] Renesas Engn Serv Co Ltd, Design Support Dept, Tokyo 1878588, Japan

[3] Renesas Elect Corp, Design Integrat Dept, Tokyo 1878588, Japan

[4] Renesas Engn Serv Co Ltd, Evaluat Anal Dept, Tokyo 1878588, Japan

[5] Nihon Univ, Coll Ind Technol, Dept Math Informat Engn, Chiba 2758575, Japan

[6] Tokyo Metropolitan Univ, Lib & Acad Informat Ctr, Tokyo 1920397, Japan

来源：

IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING | 2017年 / 30卷 / 04期

关键词：

Critical area; fault coverage; physical test coverage; test escape; quality control; high-reliability; automobiles;

D O I：

10.1109/TSM.2017.2746089

中图分类号：

T [工业技术];

学科分类号：

08 ;

摘要：

Test quality is critical to eliminate test escapes and to achieve high-reliability large-scale integrated (LSI) devices. This paper proposes a new concept called "physical test coverage" to verify test coverage based on the physical layout of LSI circuits. The physical test coverage is calculated as the ratio between the critical area of all wires in a device and that of wires undetected by LSI tests. From the critical area of undetected wires and the defect density of a manufacturing line, the risk of test escapes can be predicted. To effectively develop LSI tests that can minimize the number of test patterns, undetected wires are prioritized by the critical area related to each wire. Even when the conventional "logical" test coverage is high enough to satisfy the coverage criterion, some LSI devices investigated in this paper showed low physical test coverage depending on the physical layout of the LSI circuit. The concept of physical coverage was applied in the test development of some LSI products, and the test quality was substantially improved, such that 90% of test escapes of a device were eliminated.

引用

页码：317 / 322

页数：6