Ultralow-power silicon photonic interconnect for high-performance computing systems

被引：9

作者：

Li, Guoliang ^{[1
]}

Zheng, Xuezhe ^{[1
]}

Lexau, Jon ^{[2
]}

Luo, Ying ^{[1
]}

Thacker, Hiren ^{[1
]}

Pinguet, Thierry ^{[3
]}

Dong, Po ^{[4
]}

Feng, Dazeng ^{[4
]}

Liao, Shirong ^{[4
]}

Shafiiha, Roshanak ^{[4
]}

Asghari, Mehdi ^{[4
]}

Yao, Jin ^{[1
]}

Shi, Jing ^{[1
]}

Shubin, Ivan N. ^{[1
]}

Patil, Dinesh ^{[2
]}

Liu, Frankie ^{[2
]}

Raj, Kannan ^{[1
]}

Ho, Ron ^{[2
]}

Cunningham, John E. ^{[1
]}

Krishnamoorthy, Ashok V. ^{[1
]}

机构：

[1] Sun Microsyst Phys Sci Ctr, San Diego, CA 92121 USA

[2] Sun Labs, Menlo Pk, CA 94025 USA

[3] Luxtera Inc, Carlsbad, CA 92009 USA

[4] Kotura Inc, Monterey Pk, CA 91754 USA

来源：

OPTOELECTRONIC INTERCONNECTS AND COMPONENT INTEGRATION IX | 2010年 / 7607卷

关键词：

Optical interconnect; silicon photonics; high performance computing (HPC); optical transmitter; optical receiver; wavelength-division multiplexing (WDM); Si ring resonator; hybrid bonding; FILTERS; PHOTODETECTORS; RESONATORS; COMPACT; CMOS;

D O I：

10.1117/12.842884

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The Ultra-performance Nanophotonic Intrachip Communication (UNIC) project aims to achieve unprecedented high-density, low-power, large-bandwidth, and low-latency optical interconnect for highly compact supercomputer systems. This project, which has started in 2008, sets extremely aggressive goals on power consumptions and footprints for optical devices and the integrated VLSI circuits. In this paper we will discuss our challenges and present some of our first-year achievements, including a 320 fJ/bit hybrid-bonded optical transmitter and a 690 fJ/bit hybrid-bonded optical receiver. The optical transmitter was made of a Si microring modulator flip-chip bonded to a 90nm CMOS driver with digital clocking. With only 1.6mW power consumption measured from the power supply voltages and currents, the transmitter exhibits a wide open eye with extinction ratio > 7dB at 5Gb/s. The receiver was made of a Ge waveguide detector flip-chip bonded to a 90nm CMOS digitally clocked receiver circuit. With 3.45mW power consumption, the integrated receiver demonstrated -18.9dBm sensitivity at 5Gb/s for a BER of 10(-12). In addition, we will discuss our Mux/Demux strategy and present our devices with small footprints and low tuning energy.

引用

页数：15

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