Static Mapping of Mixed-Critical Applications for Fault-Tolerant MPSoCs

被引:29
作者
Kang, Shin-haeng [1 ]
Yang, Hoeseok [2 ]
Kim, Sungchan [3 ]
Bacivarov, Iuliana [4 ]
Ha, Soonhoi [1 ]
Thiele, Lothar [4 ]
机构
[1] Seoul Natl Univ, Sch EECS, Seoul, South Korea
[2] Ajou Univ, Dept ECE, Suwon, South Korea
[3] Chonbuk Natl Univ, Div CSE, Jeonju, South Korea
[4] Swiss Fed Inst Technol, TIK Lab, Zurich, Switzerland
来源
2014 51ST ACM/EDAC/IEEE DESIGN AUTOMATION CONFERENCE (DAC) | 2014年
关键词
Mixed-Criticality; Replication; Re-execution; Task Dropping; Worst-Case Response Time;
D O I
10.1145/2593069.2593221
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
This paper presents a static mapping optimization technique for fault-tolerant mixed-criticality MPSoCs. The uncertainties imposed by system hardening and mixed criticality algorithms, such as dynamic task dropping, make the worst-case response time analysis difficult for such systems. We tackle this challenge and propose a worst-case analysis framework that considers both reliability and mixed-criticality concerns. On top of that, we build up a design space exploration engine that optimizes fault-tolerant mixed-criticality MPSoCs and provides worst-case guarantees. We study the mapping optimization considering judicious task dropping, that may impose a certain service degradation. Extensive experiments with real-life and synthetic benchmarks confirm the effectiveness of the proposed technique.
引用
收藏
页数:6
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