共 21 条
[1]
Axer P., 2011, 2011 IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), P149
[2]
Baruah Sanjoy, 2010, Proceedings of the 16th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2010), P13, DOI 10.1109/RTAS.2010.10
[4]
Models and formal verification of multiprocessor system-on-chips
[J].
JOURNAL OF LOGIC AND ALGEBRAIC PROGRAMMING,
2008, 77 (1-2)
:1-19
[5]
On the Scheduling of Mixed-Criticality Real-Time Task Sets
[J].
2009 30TH IEEE REAL-TIME SYSTEMS SYMPOSIUM, PROCEEDINGS,
2009,
:291-+
[6]
System level performance analysis - the SymTA/S approach
[J].
IEE PROCEEDINGS-COMPUTERS AND DIGITAL TECHNIQUES,
2005, 152 (02)
:148-166
[7]
Izosimov Viacheslav., 2006, P C DESIGN AUTOMATIO, P706
[8]
Kandasamy N, 2003, LECT NOTES COMPUT SC, V2788, P275
[9]
Kang S.-H., 2014, DATE
[10]
Kim J., 2013, DAC, P129