High voltage vs. high integration: a comparison between CMOS technologies for SPAD cameras

In the last years the fabrication of SPAD cameras has become one of the main fields of interest in 3-D imaging and bio-applications. In this paper we present the comparison between two standard CMOS technologies to fabricate SPADs cameras. The two technologies used in the comparison are a high voltage 0.35 mu m technology from AMS and a high integration 130nm technology from STM. The advantage of using a standard CMOS technology among a dedicated is the possibility of integrating the control/reading electronics into the same die. Neither of the processes is optimized for optical applications, and no post-processing has been applied to improve the features. The technologies have been selected due to the different integration density, and different intrinsic process parameters with similar cost. Comparison has been done by fabricating several structures in both technologies which allow analyzing sensibility, noise, and time response. Experimental results show that the high voltage technology has a lower level of dark counts than the 130nm. Instead, the high integration technology has a shorter quenching time, 1.5ns, which reduces the afterpulsing events to a negligible level. In optical applications it is important to have a high integration of the camera reducing the pitch of the pixel, while noise effects can be corrected in post-processing. For low frequency events, such as high energetic particle tracking, the noise frequency has to be lower, but it is also required a high fill factor. Depending on the specific application this analysis allows to opt for the most suitable technology.