Charge storage and interface states effects in Si-nanocrystal memory obtained using low-energy Si+ implantation and annealing

被引：132

作者：

Kapetanakis, E ^{[1
]}

Normand, P

Tsoukalas, D

Beltsios, K

Stoemenos, J

Zhang, S

van den Berg, J

机构：

[1] NCSR Demokritos, Inst Microelect, Aghia Paraskevi 15310, Greece

[2] NCSR Demokritos, Inst Phys Chem, Aghia Paraskevi 15310, Greece

[3] Univ Thessaloniki, Dept Phys, GR-54006 Salonika, Greece

[4] Univ Salford, Dept Phys, Salford M5 4WT, Lancs, England

来源：

APPLIED PHYSICS LETTERS | 2000年 / 77卷 / 21期

关键词：

D O I：

10.1063/1.1328101

中图分类号：

O59 [应用物理学];

学科分类号：

摘要：

Thin SiO2 oxides implanted by very-low-energy (1 keV) Si ions and subsequently annealed are explored with regards to their potential as active elements of memory devices. Charge storage effects as a function of Si fluence are investigated through capacitance and channel current measurements. Capacitance-voltage and source-drain current versus gate voltage characteristics of devices implanted with a dose of 1x10(16) cm(-2) or lower exhibit clear hysteresis characteristics at low electric field. The observed fluence dependence of the device electrical properties is interpreted in terms of the implanted oxide structure. (C) 2000 American Institute of Physics. [S0003-6951(00)05447-4].

引用

页码：3450 / 3452

页数：3

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