Characterization and Failure Analysis of Wafer Bonded Devices and unfilled Through-Silicon-Vias (TSVs)

被引：2

作者：

Cassidy, C. ^{[1
]}

Kraft, J. ^{[1
]}

Koppitsch, G. ^{[1
]}

Brandlhofer, E. ^{[1
]}

Steiner, M. ^{[1
]}

Schrank, F. ^{[1
]}

Erwin, D. ^{[2
]}

Raz-Moyal, E. ^{[2
]}

机构：

[1] Austriamicrosystems AG, Graz, Austria

[2] Gatan Inc, Pleasanton, CA USA

来源：

ISTFA 2008: CONFERENCE PROCEEDINGS FROM THE 34TH INTERNATIONAL SYMPOSIUM FOR TESTING AND FAILURE ANALYSIS | 2008年

关键词：

D O I：

10.1361/cp2008istfa368

中图分类号：

TB3 [工程材料学];

学科分类号：

0805 ; 080502 ;

摘要：

This paper is concerned with characterization and failure analysis challenges posed by 3D integration of semiconductor devices, with a particular focus on wafer bonded components and Through Silicon Vias (TSV). Requirements for sample preparation are discussed, along with advantages and limitations exhibited by various different techniques. Analysis examples with real devices are presented, along with successful sample preparation solutions enabled by a precision polishing toolset.

引用

页码：368 / +

页数：2

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