A Subharmonically Injection-Locked PLL With Calibrated Injection Pulsewidth

被引：24

作者：

Wei, Chih-Lu ^{[1
]}

Kuan, Ting-Kuei

Liu, Shen-Iuan

机构：

[1] Natl Taiwan Univ, Grad Inst Elect Engn, Taipei 10617, Taiwan

来源：

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS | 2015年 / 62卷 / 06期

关键词：

Phase noise; phase-locked loop (PLL); pulsewidth-calibrated loop (PWCL); subharmonically injection locked;

D O I：

10.1109/TCSII.2015.2407753

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A subharmonically injection-locked phase-locked loop (SIPLL) using a pulsewidth-calibrated loop is presented. The injection timing and the pulsewidth of the injected pulse are calibrated to tolerate the process variations. This SIPLL is fabricated in a 40-nm CMOS process. The measured output frequency ranges from 0.4 to 1.6 GHz. Its power is 1.49 mW for a supply of 1.1 V at 1.6 GHz. The root-mean-square jitter is 2.29 ps.

引用

页码：548 / 552

页数：5

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