Built-In Self-Test for Multipliers in Altera Cyclone II Field Programmable Gate Arrays

被引:0
|
作者
Lusco, Michael A. [1 ]
Dailey, Justin L. [1 ]
Stroud, Charles E. [1 ]
机构
[1] Auburn Univ, Dept Elect & Comp Engn, Auburn, AL 36849 USA
来源
PROCEEDINGS SSST 2011: 43RD IEEE SOUTHEASTERN SYMPOSIUM ON SYSTEM THEORY | 2011年
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper describes a Built-In Self-Test (BIST) approach designed to verify the integrity of the embedded multiplier cores in Altera Cyclone II Field Programmable Gate Arrays (FPGAs). This approach uses an architecture independent test algorithm implemented with parameterized VHDL to support all FPGAs in the Cyclone II family. The BIST is capable of detecting faults within all of the multiplier's modes of operation in three downloads and can identify the location of faulty multiplier(s). (1)
引用
收藏
页码:214 / 219
页数:6
相关论文
共 50 条
  • [1] Selecting built-in self-test configurations for field programmable gate arrays
    Stroud, C
    Lee, E
    Konala, S
    Abramovici, M
    AUTOTESTCON '96 - THE SYSTEM READINESS TECHNOLOGY CONFERENCE: TEST TECHNOLOGY AND COMMERCIALIZATION, CONFERENCE RECORD, 1996, : 29 - 35
  • [2] Boundary scan access of built-in self-test for field programmable gate arrays
    Gibson, G
    Gray, L
    Stroud, C
    TENTH ANNUAL IEEE INTERNATIONAL ASIC CONFERENCE AND EXHIBIT, PROCEEDINGS, 1997, : 57 - 61
  • [3] Methods for boundary scan access of built-in self-test for field programmable gate arrays
    Hamilton, C
    Wijesuriya, S
    Gibson, G
    Stroud, C
    IEEE SOUTHEASTCON '99, PROCEEDINGS, 1999, : 210 - 216
  • [4] An approach to the built-in self-test of field programmable analog arrays
    Balen, T
    Andrade, A
    Azaïs, F
    Lubaszewski, M
    Renovell, M
    22ND IEEE VLSI TEST SYMPOSIUM, PROCEEDINGS, 2004, : 383 - 388
  • [5] On Built-In Self-Test for Multipliers
    Pulukuri, Mary D.
    Starr, George J.
    Stroud, Charles E.
    IEEE SOUTHEASTCON 2010: ENERGIZING OUR FUTURE, 2010, : 25 - 28
  • [6] Built-in self-test of global interconnects of field programmable analog arrays
    Andrade, A
    Vieira, G
    Balen, TR
    Lubaszewski, M
    Azaïs, F
    Renovell, M
    MICROELECTRONICS JOURNAL, 2005, 36 (12) : 1112 - 1123
  • [7] Built-In Self-Test of Embedded Memory Cores in Virtex-5 Field Programmable Gate Arrays
    Dailey, Justin L.
    Garrison, Brooks R.
    Pulukuri, Mary D.
    Stroud, Charles E.
    PROCEEDINGS SSST 2011: 43RD IEEE SOUTHEASTERN SYMPOSIUM ON SYSTEM THEORY, 2011, : 220 - 225
  • [8] Programmable deterministic Built-In Self-Test
    Hakmi, Abdul-Wahid
    Wunderlich, Hans-Joachim
    Zoellin, Christian G.
    Glowatz, Andreas
    Hapke, Friedrich
    Schloeffel, Juergen
    Souef, Laurent
    2007 IEEE INTERNATIONAL TEST CONFERENCE, VOLS 1 AND 2, 2007, : 476 - +
  • [9] Built-in self-test of field programmable analog arrays based on transient response analysis
    Balen, T. R.
    Calvano, J. V.
    Lubaszewski, M. S.
    Renovell, M.
    JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 2007, 23 (06): : 497 - 512
  • [10] Built-In Self-Test of Field Programmable Analog Arrays based on Transient Response Analysis
    T. R. Balen
    J. V. Calvano
    M. S. Lubaszewski
    M. Renovell
    Journal of Electronic Testing, 2007, 23 : 497 - 512