Efficient cornputation of buffer capacities for Cyclo-static dataf low graphs

被引:40
作者
Wiggers, Maarten H. [1 ]
Bekooij, Marco J. G. [2 ]
Smit, Gerard J. M. [1 ]
机构
[1] Univ Twente, POB 217, NL-7500 AE Enschede, Netherlands
[2] NXP Semiconduct, POB 217, NL-7500 AE Enschede, Netherlands
来源
2007 44TH ACM/IEEE DESIGN AUTOMATION CONFERENCE, VOLS 1 AND 2 | 2007年
关键词
system-on-chip; dataflow; buffer capacity;
D O I
10.1109/DAC.2007.375247
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
A key step in the design of cyclo-static real-time systems is the determination of buffer capacities. In our multi-processor system, we apply back-pressure, which means that tasks wait for space in output buffers. Consequently buffer capacities affect the throughput. This requires the derivation of buffer capacities that both result in a satisfaction of the throughput constraint, and also satisfy the constraints on the maximum buffer capacities. Existing exact solutions suffer from the computational complexity that is associated with the required conversion from a cyclo-static dataflow graph to a single-rate dataflow graph. In this paper we present an algorithm, with polynomial computational complexity, that does not require this conversion and that obtains close to minimal buffer capacities. The algorithm is applied to an MP3 play-back application that is mapped on our multi-processor system. For this application, we see that a cyclo-static dataflow model can reduce the buffer capacities by 50% compared to a multi-rate dataflow model.
引用
收藏
页码:658 / +
页数:2
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