Parity bit code: Achieving a complete fault coverage in the design of TSC combinational networks

被引:2
作者
Bolchini, C
Salice, F
Sciuto, D
机构
来源
SEVENTH GREAT LAKES SYMPOSIUM ON VLSI, PROCEEDINGS | 1997年
关键词
D O I
10.1109/GLSV.1997.580407
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
A new methodology for designing Totally Self-Checking combinational circuits through the encoding of the Primary Outputs with the Parity code is here presented The Parity code requires that each fault modifies an odd number of outputs for providing its detection, that is, each fault has to be oddly observable. The proposed methodology for fulfilling such a constraint consists of a post-synthesis modification of fault observability through either the introduction of an auxiliary output for the examined network node or the replication of the investigated node. A cost evaluation function allows to select the most convenient solution in terms of overhead and the final 100% TSC circuit.
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页码:32 / 37
页数:6
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