Detailed Fault Model for Physical Quantum Circuits

被引:1
作者
Deb, Arighna [1 ]
Das, Debesh K. [2 ]
机构
[1] KIIT Univ, Sch Elect Engn, Bhubaneswar, India
[2] Jadavpur Univ, Comp Sci & Engn, Kolkata, India
来源
2019 IEEE 28TH ASIAN TEST SYMPOSIUM (ATS) | 2019年
关键词
Fault model; reversible circuit; quantum circuit; COMPUTATION;
D O I
10.1109/ATS47505.2019.00028
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Quantum circuits have recently been developed thanks to the global companies like IBM, Google, Microsoft and Intel. The physical realization of quantum circuits motivates to explore new areas of research. Testing of quantum circuits is one such area which needs significant attention in order to detect faulty gate operations in the circuits. To this end, first we need to identify the different types of faults that can result due to some unwanted physical failures during the implementation of the gate operations. This paper investigates those possibilities of physical failures in realizing the quantum operations and introduces a new family of fault models for quantum circuits. Experimental results include the actual number of newly proposed faults that can occur at the physical level of any quantum circuit.
引用
收藏
页码:153 / 158
页数:6
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