Interface trap characterization of Al2O3/GaN vertical-type MOS capacitors on GaN substrate with surface treatments

被引:31
|
作者
Ren, Bing [1 ,2 ,3 ]
Sumiya, Masatomo [4 ]
Liao, Meiyong [4 ]
Koide, Yasuo [5 ]
Liu, Xinke [1 ]
Shen, Yue [6 ]
Sang, Liwen [3 ,5 ]
机构
[1] Shenzhen Univ, Coll Mat Sci & Engn, Shenzhen Key Lab Special Funct Mat, Shenzhen 518060, Peoples R China
[2] Shenzhen Univ, Coll Optoelect Engn, Minist Educ & Guangdong Prov, Key Lab Optoelect Devices & Syst, Shenzhen 518060, Peoples R China
[3] Natl Inst Mat Sci, Int Ctr Mat Nanoarchitecton MANA, 1-1 Namiki, Tsukuba, Ibaraki 3050044, Japan
[4] Natl Inst Mat Sci, Funct Mat Res Ctr, Namiki 1-1, Tsukuba, Ibaraki 3050044, Japan
[5] Natl Inst Mat Sci, Amano Koide Collaborat Res Lab, 1-1 Namiki, Tsukuba, Ibaraki 3050044, Japan
[6] Shanghai Univ, Sch Mat Sci & Engn, Shanghai 200444, Peoples R China
基金
中国国家自然科学基金;
关键词
GaN; Vertical-type MOS; Interface states; BAND OFFSETS; GATE OXIDES; DEPOSITION;
D O I
10.1016/j.jallcom.2018.07.150
中图分类号
O64 [物理化学(理论化学)、化学物理学];
学科分类号
070304 ; 081704 ;
摘要
We report on the interface trap properties Al2O3/GaN vertical-type metal-oxide-semiconductor (MOS) capacitors homogeneously grown on GaN substrates with different surface treatments. The electrical and microstructure characteristics are analyzed with regard to the behaviors and natures of different trap states at and close to the MOS interface. It is shown that only acid cleaning could not effectively suppress the interface traps, while a following (NH4)(2)S passivation drastically reduce the interface state density to the detection limit of similar to 10(11) cm(-2) eV(-1). At the same time, border traps and fixed charges located close to the MOS interface are also suppressed, leading to a neglecting electrical hysteresis and frequency dispersion in the capacitance-voltage measurement. (C) 2018 Elsevier B.V. All rights reserved.
引用
收藏
页码:600 / 605
页数:6
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