High performance and subambient silicon microchannel cooling

被引:55
作者
Colgan, E. G.
Furman, B.
Gaynes, M.
LaBianca, N.
Magerlein, J. H.
Polastre, R.
Bezama, R.
Marston, K.
Schmidt, R.
机构
[1] IBM Corp, Thomas J Watson Res Ctr, Yorktown Hts, NY 10598 USA
[2] IBM E Fishkill, Fishkill, NY 12533 USA
[3] IBM Poughkeepsie, Poughkeepsie, NY 12601 USA
来源
JOURNAL OF HEAT TRANSFER-TRANSACTIONS OF THE ASME | 2007年 / 129卷 / 08期
关键词
microchannel cooling; high power density; single phase liquid cooling;
D O I
10.1115/1.2724850
中图分类号
O414.1 [热力学];
学科分类号
摘要
High performance single-phase Si microchannel coolers have been designed and characterized in single chip modules in a laboratory environment using either water at 22 degrees C or a fluorinated fluid at temperatures between 20 and -40 degrees C as the coolant. Compared to our previous work, key performance improvements were achieved through reduced channel pitch (from 75 to 60 microns), thinned channel bases (from 425 to 200 microns of Si), improved thermal interface materials, and a thinned thermal test chip (from 725 to 400 microns of Si). With multiple heat exchanger zones and 60 micron pitch microchannels with a water flow rate of 1.25 1pm, an average unit thermal resistance of 15.9 C mm 21 W between the chip surface and the inlet cooling water was demonstrated for a Si microchannel cooler attached to a chip with Ag epoxy. Replacing the Ag epoxy layer with an In solder layer reduced the unit thermal resistance to 12.0 C mm(2)/W. Using a fluorinated fluid with an inlet temperature of -30 degrees C and 60 micron pitch microchannels with an Ag epoxy thermal interface layer the average unit thermal resistance was 25.6 C mm(2)/W. This fell to 22.6 C mm(2)/W with an In thermal interface layer Cooling > 500 W/cm(2) was demonstrated with water Using a fluorinated fluid with an inlet temperature of -30 degrees C, a chip with a power density of 270 W/cm(2) was cooled to an average chip surface temperature of 35 degrees C. Results using both water and a fluorinated fluid are presented for a range of Si microchannel designs with a channel pitch from 60 to 100 microns.
引用
收藏
页码:1046 / 1051
页数:6
相关论文
共 16 条
  • [1] CHANG JY, 2005, IPACK2005 73126 P AS
  • [2] Colgan EG, 2005, P IEEE SEMICOND THER, P1
  • [3] Silicon microchannel cooling for high power chips
    Colgan, Evan G.
    Furman, Bruce
    Gaynes, Mike
    LaBianca, Nancy
    Magerlein, John
    Polastre, Robert
    Bezama, R. J.
    Choudhary, Rehan
    Marston, Ken
    Toy, Hilton
    Wakil, Jamil A.
    Schmidt, Roger
    [J]. HVAC&R RESEARCH, 2006, 12 (04): : 1031 - 1045
  • [4] A perspective on today's scaling challenges and possible future directions
    Dennard, Robert H.
    Cai, Jin
    Kumar, Arvind
    [J]. SOLID-STATE ELECTRONICS, 2007, 51 (04) : 518 - 525
  • [5] FURMAN BK, 2005, IMAPS ADV TECHN WORK
  • [6] HARPOLE GM, 1991, P 7 IEEE SEM S, P59
  • [7] Kandlikar S., 2005, HEAT TRANSFER FLUID, P87
  • [8] COOLING CHARACTERISTICS OF DIAMOND-SHAPED INTERRUPTED COOLING FIN FOR HIGH-POWER LSI DEVICES
    KISHIMOTO, T
    SASAKI, S
    [J]. ELECTRONICS LETTERS, 1987, 23 (09) : 456 - 457
  • [9] Challenges, developments and applications of silicon deep reactive ion etching
    Laermer, F
    Urban, A
    [J]. MICROELECTRONIC ENGINEERING, 2003, 67-8 : 349 - 355
  • [10] Phillips R.J., 1990, Adv. Therm. Model. Electron. Component. Syst., V2, P109