A fully integrated spread-spectrum clock generator by using direct VCO modulation

A compact architecture for a fully-integrated spread-spectrum clock generator (SSCG) using voltage-controlled oscillator direct modulation is presented in this paper. A dual-path loop filter in the phase-locked loop is employed to reduce the size of the capacitance in the filter with the aid of an extra charge pump and a unity gain amplifier. At the same time, a third-charge pump which generates triangular waves is used to perform the function of a spread-spectrum. The proposed circuit has been fabricated using a 0.35-mu m CMOS single-poly quadruple-metal process. The clock rate from 50 to 480 MHz with a center spread range of between 0.5 % and 2 % are verified and are close to the theoretical analyses. The size of the chip area is 0.82 x 0.8 mm(2) (including the loop filter) and the power consumption was 27.5 mW at 400 MHz. Index Terms-Phase-locked loop (PLL), spread-spectrum clock generator (SSCG).