Multi-tier N=4 Binary Stacking, combining Face-to-Face and Back-to-Back Hybrid Wafer-to-Wafer Bonding Technology

被引:7
作者
Van Huylenbroeck, Stefaan [1 ]
De Vos, Joeri [1 ]
Teugels, Lieve [2 ]
Iacovo, Serena [2 ]
Fodor, Ferenc [3 ]
Miller, Andy [1 ]
Van der Plas, Geert [1 ]
Beyer, Gerald [1 ]
Beyne, Eric [4 ]
机构
[1] IMEC, 3DSIP, Leuven, Belgium
[2] IMEC, APPM, Leuven, Belgium
[3] IMEC, TSE, Leuven, Belgium
[4] IMEC, STS, Leuven, Belgium
来源
IEEE 71ST ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC 2021) | 2021年
关键词
3D Integration; hybrid wafer bonding; wafer level stacking; TSV; Via-last;
D O I
10.1109/ECTC32696.2021.00173
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A binary wafer-to-wafer stacking scheme is advantageous over a sequential approach in terms of manufacturing cost and its impact on the stacked system yield. In this paper, such a binary wafer-to-wafer stacking flow is demonstrated. Two full thickness wafers are paired Face-to-Face using a 2 mu m pitch hybrid bonding technology, followed by top wafer thinning to 5 mu m. The Face-to-Face connections are fed through to the thinned top wafer surface by means of a 1 mu m diameter by 5 mu m deep via-last TSV. 2 mu m pitch hybrid backside pads are realized on top of these via-last TSVs, at the same time levelling out and planarizing the backside of the Face-to-Face bonded wafer pairs. Two N=2 Face-to-Face bonded wafer pairs are Back-to-Back hybrid bonded to each other, realizing an N=4 multi-tier wafer stack. The N4 top wafer is thinned to 5 mu m, revealing the nails of 5 mu m diameter by 8 mu m deep v ia-middle TSVs, implemented on this N4 wafer prior to the Face-to-Face bonding. An N4 backside passivation and an aluminum METPASS module finishes the multi-tier N=4 process flow. The paper describes the realization of the above explained integration flow. Several process challenges are extensively elaborated. Electrical results, featuring 100% yielding Back-to-Back kelvin and interwoven chains connections, demonstrate the maturity of this multi-tier N=4 binary stacking process.
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页码:1057 / 1062
页数:6
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