A Self-Timed Ring Based True Random Number Generator on FPGA

被引：0

作者：

Zhang, Yifan ^{[1
]}

Jiang, Jianfei ^{[1
]}

Wang, Qin ^{[1
]}

Guan, Nin ^{[2
]}

机构：

[1] Shanghai Jiao Tong Univ, Sch Microelect, Shanghai 200240, Peoples R China

[2] Shanghai Inst Aerosp Elect Commun Equipment, Shanghai 201108, Peoples R China

来源：

2018 14TH IEEE INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUIT TECHNOLOGY (ICSICT) | 2018年

关键词：

True random number generator (TRNG); self-timed ring (STR); carry chain; high throughput;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

True random number generators (TRNGs) are essential components for information security, This paper presents a combination of self-timed ring (STR) and ultra-fast carry-logic primitives to design a new TRNG on FPGA. Applying this structure, entropy extraction efficiency of the TRNG can be improved. By manually routing, the proposed TRNG is implemented on Xilinx Virtex 5 FPGA and occupies 47 slices. The proposed TRNG can achieve 150Mbps high quality random numbers throughput and pass all NIST tests.

引用

页码：983 / 985

页数：3

共 9 条

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