A study of the effect of degradation of the aluminium metallization layer in the case of power semiconductor devices

被引：35

作者：

Pietranico, S. ^{[1
,2
]}

Lefebvre, S. ^{[1
]}

Pommier, S. ^{[2
]}

Bouaroudj, M. Berkani ^{[1
]}

Bontemps, S. ^{[3
]}

机构：

[1] UniverSud Paris, SATIE, ENS Cachan, CNRS,CNAM, F-94235 Cachan, France

[2] UniverSud Paris, ENS Cachan, LMT, CNRS, F-94235 Cachan, France

[3] Microsemi Power Module Prod, F-33520 Brugge, France

来源：

MICROELECTRONICS RELIABILITY | 2011年 / 51卷 / 9-11期

关键词：

D O I：

10.1016/j.microrel.2011.06.009

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The paper describes ageing mechanisms of the metallization layer deposited on the chips of power semiconductor devices, and the effects of its ageing on electrical performances of a power transistor. We have tried to link changes in electrical performances to metallization degradation, in order to better understand the origin of the physical mechanisms of ageing and the effects of the degradation of the metallization on electrical performances of tested devices. (C) 2011 Elsevier Ltd. All rights reserved.

引用

页码：1824 / 1829

页数：6

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