共 14 条
[1]
[Anonymous], VERILOG HARDWARE DES
[2]
BALARIN F, 1997, HARDWARE SOFTWARE CO
[3]
CHANG WT, 1997, J VLSI SIGNAL PROCES, V13
[4]
DAVIS J, 1999, M9937 ERL UCBERL
[5]
DVEAU JM, 1998, P CODES
[6]
GAJSKI D, 1998, IEEE T VLSI
[7]
LAVAGNO L, 1999, 36 DAC
[8]
Hardware/software co-synthesis with memory hierarchies
[J].
1998 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN: DIGEST OF TECHNICAL PAPERS,
1998,
:430-436
[9]
Communication synthesis for distributed embedded systems
[J].
1998 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN: DIGEST OF TECHNICAL PAPERS,
1998,
:437-444
[10]
PAUL JM, 2000, 37 DAC