Time-Domain Multi-bit ΔΣ Analog-to-Digital Converter

被引：2
|
作者：
Kuribayashi, Kazuki [1 ]
Machida, Kazuya [1 ]
Toyama, Yuji [1 ]
Waho, Takao [1 ]
机构：
[1] Sophia Univ, Dept Informat & Commun Sci, Chiyoda Ku, Tokyo 1028554, Japan
来源：
2011 41ST IEEE INTERNATIONAL SYMPOSIUM ON MULTIPLE-VALUED LOGIC (ISMVL) | 2011年
关键词：
CONVERSION;
D O I：
10.1109/ISMVL.2011.31
中图分类号：
TP301 [理论、方法];
学科分类号：
081202 ;
摘要：
A multi-bit representation in the time domain has been applied to a Delta Sigma analog-to-digital converter (ADC), which consists of an asynchronous Delta Sigma modulator (ADSM) and a time-to-digital converter (TDC). Current-mode circuits are included in the ADSM to suppress the variation in the node voltage. The TDC is based on a ring oscillator-based TDC comprised of four stages of differential delay element followed by a counter and a phase detector. The 1st-order noise-shaping was experimentally obtained for the TDC fabricated by using 0.18-mu m standard CMOS technology. A successful operation of the ADC has been obtained by transistor-level circuit simulation.
引用
收藏
页码：254 / 258
页数：5
相关论文
共 50 条
  • [1] The time-domain EMI measurement system based on a multi-level analog-to-digital converter
    Kuznetsov, Yury
    Baev, Andrey
    Bekhtin, Maxim
    Braun, Stephan
    Russer, Peter
    2005 EUROPEAN CONFERENCE ON WIRELESS TECHNOLOGIES (ECWT), CONFERENCE PROCEEDINGS, 2005, : 209 - 212
  • [2] The time-domain EMI measurement system based on a multi-level analog-to-digital converter
    Kuznetsov, Yury
    Baev, Andrey
    Bekhtin, Maxim
    Braun, Stephan
    Russer, Peter
    35TH EUROPEAN MICROWAVE CONFERENCE, VOLS 1-3, CONFERENCE PROCEEDINGS, 2005, : 1667 - 1670
  • [3] An 8-bit 20-MS/s ZCBC Time-Domain Analog-to-Digital Data Converter
    Wang, I-Hsin
    Lee, Hwei-Yu
    Liu, Shen-Iuan
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2009, 56 (07) : 545 - 549
  • [4] Analog-to-Digital Converters using not Multi-Level but Multi-Bit Feedback Paths
    Waho, Takao
    2017 IEEE 47TH INTERNATIONAL SYMPOSIUM ON MULTIPLE-VALUED LOGIC (ISMVL 2017), 2017, : 7 - 12
  • [5] A tactless analog-to-digital converter with bit-by-bit equilibration
    Dudkin M.M.
    Tsytovich L.I.
    Lokhov S.P.
    Russian Electrical Engineering, 2015, 86 (12) : 703 - 708
  • [6] Time-Domain Analog-to-Digital Converters with Domino Delay Lines
    Lai, Chang-Ming
    Chen, Yi-Chung
    Huang, Po-Chiun
    2013 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN, AUTOMATION, AND TEST (VLSI-DAT), 2013,
  • [7] Time-Domain Analog-to-Digital Converters with Domino Delay Lines
    Lai, Chang-Ming
    Chen, Yi-Chung
    Huang, Po-Chiun
    2013 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN, AUTOMATION, AND TEST (VLSI-DAT), 2013,
  • [8] A TIME CODING ANALOG-TO-DIGITAL CONVERTER
    CRONHJORT, BT
    PROCEEDINGS OF THE IEEE, 1963, 51 (11) : 1541 - &
  • [9] A 3-BIT GAAS ANALOG-TO-DIGITAL CONVERTER
    NAMORDI, MR
    OCONNELL, MR
    NEWMAN, PF
    MICROWAVE JOURNAL, 1985, 28 (05) : 56 - 56
  • [10] EXPERIMENTAL IMPLEMENTATION OF THE 8 BIT ANALOG-TO-DIGITAL CONVERTER
    KAPLUNENKO, V
    KHABIPOV, M
    KOSHELETS, V
    KOVTONYUK, S
    KHOHLOV, D
    CRYOGENICS, 1992, 32 : 558 - 561
12345