CMOS ring oscillator with quadrature outputs and 100 MHz to 3.5 GHz tuning range

A 100 MHz to 3.5 GHz four-stage CMOS ring oscillator with quadrature outputs and oscillator core current consumption roughly proportional to operating frequency is presented. A novel oscillator topology consisting of a chain of four static single-ended CMOS inverters, four additional feedforward inverters and frequency control by steering the total oscillator core current is proposed. The circuit is implemented in a 0.18 mum standard CMOS technology. Oscillator core current consumption is 90 muA at 100 MHz and 9 mA at 3.5 GHz with a 1.8 V supply. Measured phase noise at 4 MHz offset is -114 dBc/Hz at 100 MHz and -106 dBc/Hz at 3.5 GHz oscillation frequency. Quadrature error is better than 3.5 over the 100 MHz to 3 GHz frequency range.