Optimal design of second generation current conveyor using craziness-based particle swarm optimisation

被引:3
作者
Mallick, Soumen [1 ]
Kar, Rajib [2 ]
Mandal, Durbadal [2 ]
机构
[1] Dr BC Roy Engn Coll, Dept Informat Technol, Durgapur, W Bengal, India
[2] NIT Durgapur, Dept Elect & Commun Engn, Durgapur, W Bengal, India
关键词
CMOS; circuit sizing; second generation current conveyor; trans-linear loop; CRPSO; evolutionary optimisation techniques; X-port parasitic resistance; higher cut-off frequency; GA ALGORITHM; PERFORMANCE; CIRCUITS;
D O I
10.1504/IJBIC.2022.121234
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
In this paper, a population-based meta-heuristic search algorithm called craziness-based particle swarm optimisation (CRPSO) has been employed for the optimal design of positive second-generation current conveyor based on a trans-linear loop (CCII+). CRPSO accepts several random variables for encompassing improved and quicker search and utilisation in multidimensional search space. The main goal of this work is to optimally size the CCII+ building block to attain the suitable aspect ratios of the MOS transistors. To enhance the performance of a CCII+ design, it needs to increase the higher cut-off frequency of the current signal (f(CI)) as well as to decrease the input X-port parasitic resistance (R-X). Accordingly, the optimisation problem is developed as a bi-objective problem of minimisation to obtain the least value of R-X and the superior value of f(CI). The current conveyor is simulated and validated using UMC 180 nm CMOS technology with a power supply of +/- 2.5 V in Cadence Virtuoso XL Design Environment.
引用
收藏
页码:87 / 96
页数:10
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