3D integrated circuit layout visualization using VRML

被引：15

作者：

Indrusiak, LS

Reis, RAD

机构：

[1] PUCRS, BR-97500970 Uruguaiana, RS, Brazil

[2] UFRGS, Inst Informat, BR-91501970 Porto Alegre, RS, Brazil

来源：

FUTURE GENERATION COMPUTER SYSTEMS | 2001年 / 17卷 / 05期

关键词：

integrated circuits; virtual reality; World Wide Web;

D O I：

10.1016/S0167-739X(00)00036-4

中图分类号：

TP301 [理论、方法];

学科分类号：

081202 ;

摘要：

This paper introduces the virtual reality modeling language (VRML) as a way to describe the layout of integrated circuits. Using this language, the circuit can be viewed in three dimensions, adding the depth dimension, not present in the regular layout description languages. A conversion tool that parses 2D circuit layout descriptions and converts it into 3D VRML models is presented. A discussion about other applications of VRML on integrated circuits design and on educational tools is also included. (C) 2001 Elsevier Science B.V. All rights reserved.

引用

页码：503 / 511

页数：9