Comparison of three single-phase PLL algorithms for UPS applications

被引：360

作者：

Santos Filho, Rubens M. ^{[1
]}

Seixas, Paulo F. ^{[2
]}

Cortizo, Porfirio C. ^{[2
]}

Torres, Leonardo A. B. ^{[2
]}

Souza, Andre F. ^{[2
]}

机构：

[1] Ctr Fed Educ Tecnol Minas Gerais, Dept Eletron, BR-30480000 Belo Horizonte, MG, Brazil

[2] Univ Fed Minas Gerais, Dept Engn Eletron, BR-31270901 Belo Horizonte, MG, Brazil

来源：

IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS | 2008年 / 55卷 / 08期

关键词：

mathematical modeling; phase-locked loops (PLLs); uninterruptible power systems (UPSs);

D O I：

10.1109/TIE.2008.924205

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

In this paper, the performance assessment of three software single-phase phase-locked loop (PLL) algorithms is carried out by means of dynamic analysis and experimental results. Several line disturbances such as phase-angle jump, voltage sag, frequency step, and harmonics are generated by a DSP together with a D/A converter and applied to each PLL. The actual minus the estimated phase-angle values are displayed, providing a refined method for performance evaluation and comparison. Guidelines for parameters adjustments are also presented. In addition, practical implementation issues such as computational delay effects, ride-through, and computational load are addressed. The developed models proved to accurately represent the PLLs under real test conditions.

引用

页码：2923 / 2932

页数：10

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