I/O-aware deadline miss ratio management in real-time embedded databases

被引:16
作者
Kang, Woochul [1 ]
Son, Sang H. [1 ]
Stankovic, John A. [1 ]
Amirijoo, Mehdi [2 ]
机构
[1] Univ Virginia, Dept Comp Sci, Charlottesville, VA 22903 USA
[2] Linkoping Univ, Dept Comp & Informat Sci, S-58183 Linkoping, Sweden
来源
RTSS 2007: 28TH IEEE INTERNATIONAL REAL-TIME SYSTEMS SYMPOSIUM, PROCEEDINGS | 2007年
关键词
D O I
10.1109/RTSS.2007.19
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Recently, cheap and large capacity non-volatile memory such as flash memory is rapidly replacing disks in embedded systems. While the access time of flash memory is highly predictable, deadline misses may occur if data objects in flash memory are not properly managed in real-time embedded databases. Buffer cache can be used to mitigate this problem. However since the workload of a real-time database cannot be precisely predicted, it may not be feasible to provide enough buffer space to satisfy all timing constraints. Several deadline miss ratio management schemes have been proposed, but they do not consider I/O activities. In this paper we present an I/O-aware deadline miss ratio management scheme in real-time embedded databases whose secondary storage is flash memory. We propose an adaptive I/O deadline assignment scheme, in which I/O deadlines are derived from up-to-date system status. We also present a deadline miss ratio management architecture where a control theory-based feedback control loop prevents resource overload both in I/O and CPU. A simulation study shows that our approach can effectively cope with both I/O and CPU overload to achieve the desired deadline miss ratio.
引用
收藏
页码:277 / +
页数:2
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