Heterogeneous Integration at Fine Pitch (≤ 10 μm) using Thermal Compression Bonding

被引：64

作者：

Bajwa, Adeel A. ^{[1
]}

Jangam, SivaChandra ^{[1
]}

Pal, Saptadeep ^{[1
]}

Marathe, Niteesh ^{[1
]}

Bai, Tingyu ^{[1
]}

Fukushima, Takafumi ^{[1
]}

Goorsky, Mark ^{[1
]}

Iyer, Subramanian S. ^{[1
]}

机构：

[1] UCLA, CHIPS, 420 Westwood Plaza,Engn 4,66-127B, Los Angeles, CA 90024 USA

来源：

2017 IEEE 67TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC 2017) | 2017年

关键词：

Siclicon Interconnect Fabric (Si-IF); interconnect pitch; dielet-to-dielet spacing; thermal compression bonding (TCB); heterogeneous integrations; INTERCONNECTS; OXIDATION; STRENGTH;

D O I：

10.1109/ECTC.2017.240

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The scaling of package and circuit board dimensions is central to heterogeneous system integration. We describe our solderless direct metal-to-metal low pressure (< 70 MPa) and low temperature (< 250 degrees C) thermal compression bonding (TCB) technique and present preliminary results of dielet (4 - 25 mm(2) area) attach to a rigid Silicon Interconnect Fabric (Si-IF) with up to two levels of wiring (2 - 10 mu m pitch). Dielets were attached at a pitch <= 10 mu m with an inter-dielet spacing of <= 100 mu m. We show an effective specific contact resistance of < 1 Omega-mu m(2) and shear strength of > 20 MPa. The combined reduction of dielet interconnect pitch, dielet-to-dielet spacing and trace pitch will enable a Moore's law for packaging.

引用

页码：1276 / 1284

页数：9

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