Interfacing Issues in Real-Time Digital Simulators IEEE Task Force on Interfacing Techniques for Simulation Tools

被引：116

作者：

Ren, W. ^{[1
]}

Sloderbeck, M. ^{[1
]}

Steurer, M. ^{[1
]}

Dinavahi, V. ^{[1
]}

Noda, T. ^{[1
]}

Filizadeh, S. ^{[1
]}

Chevrefils, A. R. ^{[1
]}

Matar, M. ^{[1
]}

Iravani, R. ^{[1
]}

Dufour, C. ^{[1
]}

Belanger, J. ^{[1
]}

Faruque, M. O. ^{[1
]}

Strunz, K. ^{[1
]}

Martinez, J. A. ^{[1
]}

机构：

[1] Univ Alberta, Dept Elect & Comp Engn, Edmonton, AB T6G 2V4, Canada

来源：

IEEE TRANSACTIONS ON POWER DELIVERY | 2011年 / 26卷 / 02期

关键词：

Field-programmable gate arrays (FPGAs); hardware-in-the-loop simulation; interface algorithms; modeling; power-electronic systems; power system simulation; real-time systems; POWER ELECTRONICS; REPRESENTATION; EFFICIENT; DESIGN;

D O I：

10.1109/TPWRD.2010.2072792

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper deals with the current state-of-the-art in interfacing issues related to real-time digital simulators employed in the simulation of power systems and power-electronic systems. This paper provides an overview of technical challenges encountered and their solutions as the real-time digital simulators evolved. Hardware-in-the-loop interfacing for controller hardware and power apparatus hardware are also presented.

引用

页码：1221 / 1230

页数：10

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