Dynamic Partitioning for Library based Placement on Heterogeneous FPGAs

被引：0
|
作者：
Mao, Fubing [1 ]
Zhang, Wei [2 ]
He, Bingsheng [3 ]
Lam, Siew-Kei [1 ]
机构：
[1] Nanyang Technol Univ, Singapore, Singapore
[2] Hong Kong Univ Sci & Technol, Hong Kong, Peoples R China
[3] Natl Univ Singapore, Singapore, Singapore
来源：
FPGA'17: PROCEEDINGS OF THE 2017 ACM/SIGDA INTERNATIONAL SYMPOSIUM ON FIELD-PROGRAMMABLE GATE ARRAYS | 2017年
关键词：
FPGA; B*-tree; Placement; Dynamic Partitioning;
D O I：
10.1145/3020078.3021803
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
引用
收藏
页码：296 / 296
页数：1
相关论文
共 50 条
  • [21] Multi-resource aware partitioning algorithms for FPGAs with heterogeneous resources
    Selvakkumaran, N
    Ranjan, A
    Raje, S
    Karypis, G
    41ST DESIGN AUTOMATION CONFERENCE, PROCEEDINGS 2004, 2004, : 741 - 746
  • [22] Energy Efficient Partitioning of Dynamic Reconfigurable MRAM-FPGAs
    Ahari, Ali
    Ebrahimi, Mojtaba
    Tahoori, Mehdi B.
    2015 25TH INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS, 2015,
  • [23] Partitioning and Scheduling with Module Merging on Dynamic Partial Reconfigurable FPGAs
    Tang, Qi
    Wang, Zhe
    Guo, Biao
    Zhu, Li-Hua
    Wei, Ji-Bo
    ACM TRANSACTIONS ON RECONFIGURABLE TECHNOLOGY AND SYSTEMS, 2020, 13 (03)
  • [24] Clock-Aware Placement for Large-Scale Heterogeneous FPGAs
    Chen, Jianli
    Lin, Zhifeng
    Kuo, Yun-Chih
    Huang, Chau-Chin
    Chang, Yao-Wen
    Chen, Shih-Chun
    Chiang, Chun-Han
    Kuo, Sy-Yen
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 39 (12) : 5042 - 5055
  • [25] Clock-Aware Placement for Large-Scale Heterogeneous FPGAs
    Kuo, Yun-Chih
    Huang, Chau-Chin
    Chen, Shih-Chun
    Chiang, Chun-Han
    Chang, Yao-Wen
    Kuo, Sy-Yen
    2017 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN (ICCAD), 2017, : 519 - 526
  • [26] Timing-Driven Placement for FPGAs with Heterogeneous Architectures and Clock Constraints
    Lin, Zhifeng
    Xie, Yanyue
    Qian, Gang
    Chen, Jianli
    Wang, Sifei
    Yu, Jun
    Chang, Yao-Wen
    PROCEEDINGS OF THE 2021 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE 2021), 2021, : 1564 - 1569
  • [27] Dynamic partitioning-based JPEG decompression on heterogeneous multicore architectures
    Sodsong, Wasuwee
    Hong, Jingun
    Chung, Seongwook
    Lim, Yeongkyu
    Kim, Shin-Dug
    Burgstaller, Bernd
    CONCURRENCY AND COMPUTATION-PRACTICE & EXPERIENCE, 2016, 28 (02): : 517 - 536
  • [28] Greedy Approach Based Heuristics for Partitioning SpMxV on FPGAs
    Huang, Jiasen
    Lu, Weina
    Ren, Junyan
    2015 25TH INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS, 2015,
  • [29] A FAST PARTITIONING METHOD FOR PLA-BASED FPGAS
    HASAN, Z
    HARRISON, D
    CIESIELSKI, M
    IEEE DESIGN & TEST OF COMPUTERS, 1992, 9 (04): : 34 - 39
  • [30] A Study of Data Partitioning on OpenCL-based FPGAs
    Wang, Zeke
    He, Bingsheng
    Zhang, Wei
    2015 25TH INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS, 2015,
12345