Realization of high-speed data acquisition using FIFO memory

被引：0

作者：

Mi, GS ^{[1
]}

机构：

[1] Lanzhou Jiaotong Univ, Coll Informat & Elect Engn, Lanzhou 730070, Peoples R China

来源：

ISTM/2005: 6th International Symposium on Test and Measurement, Vols 1-9, Conference Proceedings | 2005年

关键词：

D O I：

暂无

中图分类号：

TH7 [仪器、仪表];

学科分类号：

0804 ; 080401 ; 081102 ;

摘要：

This paper proposes a method of realizing high-speed acquisition using high-speed ADC and FIFO memory. The data acquisition system schematic is given in detail based on FIFO memory which is composed by LH5496(H) and the work process of such an data acquisition system is also particular described. In addition, the design method of high-speed time sequence logic control circuit and the circuit's signals time sequence relation is also discussed.

引用

页码：439 / 442

页数：4

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