GA Based Selective Harmonic Elimination for Multilevel Inverter with Reduced Number of Switches

被引:0
作者
Karaca, Hulusi [1 ]
Bektas, Enes [2 ]
机构
[1] Selcuk Univ, Fac Technol, Dept Elect & Elect Engn, TR-42075 Konya, Turkey
[2] Univ Cankin Karatekin, Fac Engn & Architecture, Dept Elect & Elect Engn, Cankiri, Turkey
来源
WORLD CONGRESS ON ENGINEERING AND COMPUTER SCIENCE, WCECS 2015, VOL I | 2015年
关键词
Genetic algorithm; minimum number of switches; multilevel inverter; selective harmonic elimination; total harmonic distortion;
D O I
暂无
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
Multilevel inverters have been used in the power applications to get low total harmonic distortion (THD) in medium or high voltage levels. In order to get low THD in the output voltage, several techniques have been applied to multilevel inverter. One of these techniques is Selective Harmonic Elimination (SHE) that has an extensive research area in the field of power electronics. It is also an alternative to usual PWM techniques and includes nonlinear equations of stepped voltage waveform. In this paper, multilevel inverter with reduced number of switches which enables a reduction in the system cost has been proposed, and solution of SHE equations have been optimized by Genetic Algorithm (GA). The results of simulation and analysis have apparently proved that proposed GA based SHE technique eliminates desired harmonic order.
引用
收藏
页码:204 / 209
页数:6
相关论文
共 12 条
[1]   New cascaded multilevel inverter topology with minimum number of switches [J].
Babaei, Ebrahim ;
Hosseini, Seyed Hossein .
ENERGY CONVERSION AND MANAGEMENT, 2009, 50 (11) :2761-2767
[2]  
Baskaran J., 2012, INT J SOFT COMPUT EN, V2, P321
[3]  
Bouhali O., 2013, Int. J. Inf. Electron. Eng., V3, P191
[4]   Selective harmonic elimination of new family of multilevel inverters using genetic algorithms [J].
El-Naggar, Khaled ;
Abdelhamid, Tamer H. .
ENERGY CONVERSION AND MANAGEMENT, 2008, 49 (01) :89-95
[5]   A Generalized Half-Wave Symmetry SHE-PWM Formulation for Multilevel Voltage Inverters [J].
Fei, Wanmin ;
Du, Xiaoli ;
Wu, Bin .
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 2010, 57 (09) :3030-3038
[6]  
Gkoutioudi K., 2012, 2012 10 IEEE INT S P
[7]  
Karaca H., 2013, P WORLD C ENG COMP S, V1
[8]  
Kumar D., 2012, IJERA, V2, P2389
[9]  
Kumar J., 2008, 15 NAT POW SYST C NP, P608
[10]   Multilevel inverters:: A survey of topologies, controls, and applications [J].
Rodríguez, J ;
Lai, JS ;
Peng, FZ .
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 2002, 49 (04) :724-738