Low-pass filtering or gain tuning free simple DC offset rejection technique for single and three-phase systems

被引:17
作者
Ahmed, Hafiz [1 ,2 ]
Biricik, Samet [3 ,4 ]
Benbouzid, Mohamed [5 ,6 ]
机构
[1] Coventry Univ, Sch Mech Aerosp & Automot Engn, Coventry, W Midlands, England
[2] Coventry Univ, Inst Future Transport & Cities, Coventry CV1 2TL, W Midlands, England
[3] European Univ Lefke, Dept Elect & Elect Engn, Mersin 10, North Cyprus, Turkey
[4] Technol Univ Dublin, Sch Elect & Elect Engn, Dublin, Ireland
[5] Univ Brest, CNRS, UMR, IRDL 6027, F-29238 Brest, France
[6] Shanghai Maritime Univ, Shanghai 201306, Peoples R China
关键词
Phase estimation; Frequency estimation; DC offset; LOOP SYNCHRONIZATION TECHNIQUE; PHASOR ESTIMATION; CONTROL ALGORITHM; POWER QUALITY; INVERTER; PLL; TRACKING;
D O I
10.1016/j.epsr.2020.106422
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper aims to address the DC offset rejection problem in grid synchronization algorithm. A simple approach to estimate the unknown grid frequency in the presence of DC offset is proposed for this purpose. Some of the existing techniques available in the literature use either low-pass filter or an additional integrator to eliminate the DC offset. Both approaches require an additional parameter to tune. However, tuning the additional parameter is not straightforward. Moreover, tuning the overall system can be complicated due to the presence of DC offset rejection part. The proposed approach does not require any additional parameter to tune. By considering the orthogonal signal instead of the DC offset as an additional state, the proposed technique can efficiently estimate the unknown frequency of the grid. Application to both single and three-phase grids are provided. Comparative experimental results with DC offset rejection capable second-order generalized integrator (SOGI) phase-locked loop (PLL) (SOGI-PLL) demonstrate the effectiveness and suitability of the proposed technique.
引用
收藏
页数:10
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