Star-Type Architecture with Low Transmission Latency for a 2D Mesh NOC

被引：0

作者：

Chen, Kuan-Ju ^{[1
]}

Peng, Chin-Hung ^{[1
]}

Lai, Feipei ^{[1
]}

机构：

[1] Natl Taiwan Univ, Dept Comp Sci & Informat Engn, Dept Elect Engn, Grad Inst Biomed Elect & Bioinformat, Taipei 10617, Taiwan

来源：

PROCEEDINGS OF THE 2010 IEEE ASIA PACIFIC CONFERENCE ON CIRCUIT AND SYSTEM (APCCAS) | 2010年

关键词：

Network on chip; star type; mesh; low latency; deadlock-free;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The 2D mesh network on chip (NOC) is a popular NOC topology because of network scalability and the use of a simple routing algorithm. However, the long distance traffic may suffer from high transmission latency. In this paper, we propose an improved design called the star-type architecture in which the long distance traffic is allowed to traverse an additional second-level mesh. Simulation results demonstrate that the proposed design can reduce the number of hops traversed for long distance traffic. A 12 x 12 star-type NOC shows performance improvements of 17.2% and 10.3% in comparison with the normal 2D mesh and level-2 mesh architectures, respectively.

引用

页码：915 / 918

页数：4

共 50 条

[31] High throughput and low-latency implementation of bit-level systolic architecture for 1D and 2D digital filters
Mohanty, BK
Meher, PK
IEE PROCEEDINGS-COMPUTERS AND DIGITAL TECHNIQUES, 1999, 146 (02): : 91 - 99
[32] Allocation-time-based processor allocation scheme for 2D mesh architecture
Zhu, XM
Lin, WM
JOURNAL OF INFORMATION SCIENCE AND ENGINEERING, 2000, 16 (02) : 301 - 311
[33] A Minimum-Path Mapping Algorithm for 2D Mesh Network on Chip Architecture
Fen, Ge
Ning, Wu
2008 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS (APCCAS 2008), VOLS 1-4, 2008, : 1542 - 1545
[34] A VLSI architecture for 2D mesh-based video object motion estimation
Badawy, W
Bayoumi, M
IEEE INTERNATIONAL CONFERENCE ON CONSUMER ELECTRONICS - 2000 DIGEST OF TECHNICAL PAPERS, 2000, : 124 - 125
[35] Network-on-chip Routing Using Structural Diametrical 2D Mesh Architecture
Ghosal, Prasun
Das, Tuhin Subhra
2012 THIRD INTERNATIONAL CONFERENCE ON EMERGING APPLICATIONS OF INFORMATION TECHNOLOGY (EAIT), 2012, : 471 - 474
[36] Allocation time-based processor allocation scheme for 2D mesh architecture
Zhu, XM
Lin, WM
1998 INTERNATIONAL CONFERENCE ON PARALLEL AND DISTRIBUTED SYSTEMS, PROCEEDINGS, 1998, : 447 - 451
[37] Adaptive Look Ahead Algorithm for 2-D Mesh NoC
Menon, Abhilash
Zeng, Lian
Jiang, Xin
Watanabe, Takahiro
2015 IEEE INTERNATIONAL ADVANCE COMPUTING CONFERENCE (IACC), 2015, : 299 - 302
[38] An asynchronous NOC architecture providing low latency service and its multi-level design framework
Beigné, E
Clermidy, F
Vivet, P
Clouard, A
Renaudin, M
11TH IEEE INTERNATIONAL SYMPOSIUM ON ASYNCHRONOUS CIRCUITS AND SYSTEMS, PROCEEDINGS, 2005, : 54 - 63
[39] Kinetic Mesh Refinement in 2D
Acar, Umut A.
Hudson, Benoit
Tuerkoglu, Duru
COMPUTATIONAL GEOMETRY (SCG 11), 2011, : 341 - 350
[40] 一种适用于2D Mesh NoC的低延迟路由算法
韩国栋
张士鉴
柯璘
小型微型计算机系统, 2014, 35 (03) : 463 - 466

← 1 2 3 4 5 →