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- [21] An Analysis of Connectivity and Yield for 2D Mesh Based NoC with Interconnect Router Failures 11TH EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN - ARCHITECTURES, METHODS AND TOOLS : DSD 2008, PROCEEDINGS, 2008, : 173 - 178
- [22] VLSI architecture for hierarchical 2D mesh representation for very low bit rate applications 42ND MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, PROCEEDINGS, VOLS 1 AND 2, 1999, : 77 - 80
- [23] Energy Efficient and High Performance Modified Mesh based 2-D NoC Architecture 2021 IEEE 22ND INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE SWITCHING AND ROUTING (IEEE HPSR), 2021,
- [25] Efficient Memory Access in 2D Mesh NoC Architectures using High Bandwidth Routers 2013 26TH SYMPOSIUM ON INTEGRATED CIRCUITS AND SYSTEMS DESIGN (SBCCI 2013), 2013,
- [26] A Novel Reconfiguration Strategy for 2D Mesh-based NoC Faulty Core Tolerance 2012 IEEE 11TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUIT TECHNOLOGY (ICSICT-2012), 2012, : 690 - 692
- [29] Tiny NoC: A 3D Mesh Topology with Router Channel Optimization for Area and Latency Minimization 2014 27TH INTERNATIONAL CONFERENCE ON VLSI DESIGN AND 2014 13TH INTERNATIONAL CONFERENCE ON EMBEDDED SYSTEMS (VLSID 2014), 2014, : 228 - 233