CHIPIX65: developments on a new generation pixel readout ASIC in CMOS 65 nm for HEP experiments

被引：15

作者：

Demaria, N. ^{[1
]}

Dellacasa, G. ^{[1
]}

Mazza, G. ^{[1
]}

Rivetti, A. ^{[1
]}

Rolo, M. D. Da Rocha

Monteil, E. ^{[1
,2
]}

Pacher, L. ^{[1
,2
]}

Ciciriello, F. ^{[3
]}

Corsi, F. ^{[3
]}

Marzocca, C. ^{[3
]}

De Robertis, G. ^{[4
]}

Loddo, F. ^{[4
]}

Tamma, C. ^{[4
]}

Bagatin, M. ^{[5
,6
]}

Bisello, D. ^{[5
,6
]}

Gerardin, S. ^{[5
,6
]}

Mattiazzo, S. ^{[5
,6
]}

Ding, L. ^{[5
,6
]}

Giubilato, P. ^{[5
,6
]}

Paccagnella, A. ^{[5
,6
]}

De Canio, E. ^{[7
,8
]}

Gaioni, L. ^{[7
,8
]}

Manghisoni, M. ^{[7
,8
]}

Re, V. ^{[7
,8
]}

Traversi, G. ^{[7
,8
]}

Riceputi, E. ^{[7
,8
]}

Ratti, L. ^{[9
,10
]}

Vacchi, C. ^{[9
,10
]}

Beccherle, R. ^{[11
]}

Magazzu, G. ^{[11
]}

Minuti, M. ^{[11
]}

Morsani, F. ^{[11
]}

Palla, F. ^{[11
]}

Liberali, V. ^{[12
,13
]}

Shojaii, S. ^{[12
,13
]}

Stabile, A. ^{[12
,13
]}

Bilei, G. M. ^{[14
]}

Menichelli, M. ^{[14
]}

Conti, E. ^{[14
,15
]}

Marconi, S. ^{[14
,15
]}

Passeri, D. ^{[14
,15
]}

Placidi, P. ^{[14
,15
]}

机构：

[1] Ist Nazl Fis Nucl, Sez Torino, Turin, Italy

[2] Univ Turin, Turin, Italy

[3] Politecn Bari, Bari, Italy

[4] Ist Nazl Fis Nucl, Sez Bari, Bari, Italy

[5] Ist Nazl Fis Nucl, Sez Padova, Padua, Italy

[6] Univ Padua, Padua, Italy

[7] Ist Nazl Fis Nucl, Sez Pavia, Bergamo, Italy

[8] Univ Bergamo, Bergamo, Italy

[9] Ist Nazl Fis Nucl, Sez Pavia, Pavia, Italy

[10] Univ Pavia, Pavia, Italy

[11] Ist Nazl Fis Nucl, Sez Pisa, Pisa, Italy

[12] Ist Nazl Fis Nucl, Sez Milano, Milan, Italy

[13] Univ Milan, Milan, Italy

[14] Ist Nazl Fis Nucl, Sez Perugia, Perugia, Italy

[15] Univ Perugia, Dept Engn, I-06100 Perugia, Italy

来源：

2015 6TH IEEE INTERNATIONAL WORKSHOP ON ADVANCES IN SENSORS AND INTERFACES (IWASI) | 2015年

关键词：

D O I：

10.1109/IWASI.2015.7184947

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Pixel detectors at HL-LHC experiments or other future experiments are facing new challenges, especially in terms of unprecedented levels of radiation and particle flux. This paper describes the progress made by the CHIPIX65 project of INFN for the development of a new generation readout ASIC using CMOS 65 nm technology.

引用

页码：49 / 54

页数：6

共 9 条

[1]

Ciriani V., 2014, P INT C EL CIRC SYST, DOI [10.1109/ICECS.2014.7050063, DOI 10.1109/ICECS.2014.7050063]

[2] Pixel chip architecture optimization based on a simplified statistical and analytical model [J].